Implement soft-start by placing a resistor from ISET to
REF and a capacitor from ISET to GND (Figure 8). In
shutdown, ISET is discharged to GND through an
on-chip 100k﹔esistor. At power-up, ISET is 0V and the
current limit is zero. As the capacitor voltage rises, the
current limit increases and the output voltage rises. The
soft-start time constant is:
Placing a capacitor across the lower resistor of the cur-
rent-limiting resistive divider provides both features
simultaneously (Figure 9).
Package Selection
The MAX1765 is available in two packages, a 16-pin
QSOP and a thermally enhanced TSSOP-EP. The
QSOP is the less expensive of the two packages, and
requires a less complex layout design. This layout
allows the designer to route underneath the device. The
power dissipation for the QSOP is 0.7W.
The TSSOP-EP comes with an exposed metal pad that
is connected to the substrate of the IC. This increases
the power dissipation up to 1.5W for the TSSOP-EP. To
achieve maximum power capability, the exposed pad
of the TSSOP-EP should be reflowed to a pad with low
thermal resistance. For convenience, this pad can be
connected to AGND or PGND.
Inductor Selection
The MAX1765s high switching frequency allows the
use of a small surface-mount inductor. For most appli-
cations, a 3.3礖 inductor works well. The inductor
t =
RISE
R C
SS SS
800mA, Low-Noise, Step-Up DC-DC Converter
with 500mA Linear Regulator
Figure 4. Dual-Output Power Supply
MAX1765
INPUT
0.7V TO 5.5V
GND CLK/SEL FBL PGND
OUTL
POUT
LX
OUT
REF
ILIM
4.7?/DIV>
0.68糉 150k
V
LDO
= 2.85V
FB
33糉 x 2
3.3糎
TRACK
ONL
ONB
ONA
OFF
ON
ON
OFF
TRACK
TRACK = LOW, V
OUT
= 5.0V
TRACK = HIGH, V
OUT
= 3.35V
0.22糉
50k
4.7糉
INL
Figure 5. LDO Enable Allows True Boost Shutdown
LX
POUT
INL
OUTL
OUTPUT
INPUT
MAX1765
ONL
ONA
SHDN
ON
OFF
FBL
R3
R4
Figure 6. PFET Allows True Boost Shutdown
LX
POUT
FB
OUT
OUTPUT
INPUT
MAX1765
SHDN
ONB
OFF
ON
______________________________________________________________________________________ 15
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